Flemish expertise drives innovation in cryptographic hardware and embedded security

The IACR CHES 2025 conference once again showcased cutting-edge research in cryptographic hardware and embedded systems. Among the standout contributors was COSIC/KU Leuven, whose researchers co-authored 10 research papers spanning masking techniques, post-quantum cryptography, hardware acceleration and true random number generators (TRNGs). This strong presence underscores COSIC’s continued leadership in hardware security.
The contributions reflect a blend of theoretical innovation and practical engineering, often in collaboration with international research institutions. The diversity of topics—from masking and fault tolerance demonstrates a holistic approach to securing embedded systems.
As cryptographic hardware faces growing challenges from quantum threats, side-channel vulnerabilities, and performance constraints, this research continues to shape the future of secure computing, by not only advancing academic understanding but also paving the way for real-world implementations in secure devices. An example of this real-world impact is COSIC’s involvement in the ORSHIN project, highlighted at CHES through a dedicated workshop.  The aim? To advance open-source hardware security through collaborative, community-driven innovation.

The list of contributions:

Countering side-channel attacks:

• Constant-Cycle Hardware Private Circuits  [paper]
  Daniel Lammers, Nicolai Müller, Siemen Dhooghe, Amir Moradi
  Ruhr University Bochum; KU Leuven; TU Darmstadt
• Code-based Masking: From Fields to Bits Bitsliced Higher-Order Masked SKINNY [paper]
  John Gaspoz, Siemen Dhooghe
  KU Leuven
• Higher-Order Time Sharing Masking [paper]
  Dilip Kumar Shanmugasundaram Veeraraghavan, Siemen Dhooghe, Josep Balasch, Benedikt Gierlichs, Ingrid Verbauwhede
  KU Leuven
• Extending Randomness-Free First-Order Masking Schemes and Applications to Masking-Friendly S-boxes [paper]
  Lixuan Wu, Yanhong Fan, Weijia Wang, Bart Preneel, Meiqin Wang
  Shandong University; KU Leuven
• Bit t-SNI Secure Multiplication Gadget for Inner Product Masking [paper]
  John Gaspoz, Siemen Dhooghe
  KU Leuven

Efficient implementation of cryptographic protocols

• FINAL bootstrap acceleration on FPGA using DSP-free constant-multiplier NTTs [paper]
  Jonas Bertels, Hilder V. L. Pereira, Ingrid Verbauwhede
  KU Leuven; University of Campinas
• Rudraksh: A Compact and Lightweight Post-Quantum Key-Encapsulation Mechanism [paper]
  Suparna Kundu, Archisman Ghosh, Angshuman Karmakar, Shreyas Sen, Ingrid Verbauwhede
  KU Leuven; Purdue University; Indian Institute of Technology Kanpur
• OPTIMSM: FPGA hardware accelerator for Zero-Knowledge MSM [paper]
  Xander Pottier, Thomas de Ruijter, Jonas Bertels, Wouter Legiest, Michiel Van Beirendonck, Ingrid Verbauwhede
  KU Leuven

True random number generators

• Entropy extractor based high-throughput post-processings for True Random Number Generators [paper]
  Yifan Dang, Milos Grujic, Bohan Yang, Wenping Zhu, Hanning Wang, Min Zhu, Ingrid Verbauwhede, Leibo Liu
  Tsinghua University; KU Leuven; Wuxi Micro Innovation Integrated Circuit Design Co., Ltd.

Vulnerabilities in legacy mobile encryption

• A5/3 make or break: A massively parallel FPGA architecture for exhaustive key search [paper]
  Konstantina Miteloudi, Lejla Batina, Nele Mentens
  Radboud University; KU Leuven; Leiden University